80812hk/41912 sy 20110920-s00002 no.a2053-1/7 http://onsemi.com semiconductor components industries, llc, 2013 june, 2013 * i 2 c bus is a trademark of philips corporation. lc898300xa overview lc898300xa is a linear vibrator driver ic for a haptics and a vibrator installed in mobile equipments. the best feature is it can adjust the drive frequency to the resona nce frequency of the linear vi brator automatically without external parts. as a result, the vibration power is not influenced by the difference of the resonance frequency and it is not necessary to care about the shift of resonance frequency with the lapse of time or the impact of fall. and it is possible to improve the brake performance with the automatic brake function. moreover, it is possible to reduce the power consumption by highly effective drive. functions ? automatic adjustment to the individual resonance frequency ? automatic brake function ? initial drive frequency adjustment function ? drive voltage adjustment with i 2 c if setting ? various drive pattern with i 2 c* if setting (1.8v if is available) ? low driving noise ? low power consumption by highly effective drive (100degree drive) applications ? linear vibrator (vibration and haptics) ? mobile phone ? portable game ? mobile equipment with haptics function specifications absolute maximum ratings at v ss = 0v parameter symbol conditions ratings unit supply voltage range v dd max -0.3 to 4.6 v v i 1 -0.3 to v dd +0.3 v input voltage v i 2 *1 -0.3 to 5.8 v output voltage v o -0.3 to v dd +0.3 v h-bridge drive current i o max 150 ma allowable power dissipation pd max ta = 85 c *2 170 mw operating temperature range ta -30 to 85 c storage temperature range tstg -55 to 125 c input or output current i i ,i o *3 20 ma *1: input voltage without diode connection to v dd . (sda, scl) *2: grass epoxy (50mm 40mm 0.9mm 3 , fr-4) *3: per an i/o buffer cmos lsi linear vibrator driver ic orderin g numbe r : ena2053 stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended oper ating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliabili ty.
lc898300xa no.a2053-2/7 recommended operating conditions at ta = -30 to 85 c, v ss = 0v ratings parameter symbol conditions min typ max unit supply voltage range v dd 2.7 3.0 3.3 v input voltage range v in 1 0 - v dd v *1: input voltage without diode connection to v dd . (sda, scl) electrical characteristics ratings parameter symbol conditions applied pin min typ max unit dc characteristics at v ss = 0v, v dd = 2.7 to 3.3v, ta = -30 to 85 c high level input voltage v ih 1 0.7v dd - - v low level input voltage v il 1 cmos test - - 0.2v dd v high level input voltage v ih 2 1.5 - - v low level input voltage v il 2 cmos en - - 0.36 v high level input voltage v ih 3 1.5 - - v low level input voltage v il 3 cmos schmitt rstb, sda , scl - - 0.36 v low level output voltage v ol i ol = 4ma sda - - 0.4 v input leakage current i il v i = v dd , v ss rstb, en , sda, scl -10 - +10 a analog characteristics at v ss = 0v, v dd = 3v, ta = 25 c h-bridge on resistance pch r onp i f = 100ma - 2.5 - h-bridge on resistance nch r onn i s = 100ma - 1.5 - adjustable resonance frequency range fmo vs typ value -10 - +10 % package dimensions unit : mm (typ) 3429 sanyo : wlp9(1.39x1.21) top view side view side view bottom view 1.21 1.39 a b c 0.205 0.4 1 2 3 0.295 0.4 0.56 max 0.08 (0.43) 0.20
lc898300xa no.a2053-3/7 block diagram pin assignment pin list i/o ( i: input, o: output, b: bi-direction, p: power supply, nc: not connected ) no name i/o no name i/o no name i/o 1a sda b 1b en i 1c rstb i 2a v dd p 2b out2 o 2c scl i 3a test i 3b out1 o 3c gnd p pin layout pin description i/o ( i: input, o: output, b: bi-direction, p: power supply, nc: not connected ) signal name i/o function remarks out1 o motor drive pin h-bridge output out2 o motor drive pin h-bridge output rstb i reset and standby control l: enable, h: disable en i motor drive on/off l: disable, h: enable scl i i 2 c i/f clock pin sda b i 2 c i/f data pin open drain test i test pin l: disable, h: enable (normally low fix) v dd p power supply pin v ss p gnd pin en scl sda drive signal generator register setting h-bridge por osc test v ss rstb out1 out2 out2 linear vibrator v dd gnd scl rstb out1 test v dd sda en out2 c b a 3 2 1 < bottom view >
lc898300xa no.a2053-4/7 timing chart motor drive timing the motor is driven by en pin, and the driving time is controlled by keeping en pin ?h?. the high speed start up time, driving power and brake time can be modified by i 2 c setting. the initial driving frequency must be set by i 2 c i/f at the center of resonance frequency of the linear vibrat ors, when the initial driving frequency is inadequate. the minimum width of en signal must be larger than the cycle of initial driving frequency setting. stand-by control the stand-by mode is controlled by rstb pin. (rstb=?l? ? stand-by mode is on.) when the stand-by mode is ?on?, the register value is set to initial value. so, the register must be set again after the stand-by mode is ?off?. and, the ?en? signal and i2c command must wait over 200us after ?rstb? pin is set to ?h?. en control the width of en=high should be set at least 1 driving cycle. ex) 0x02 resofrq=0x0a (175hz) ? (min) 5.71ms the width of en=low should be kept over 30ms, if the pre-driving period is over 30ms. on the other hand, if the pre-driving period is less than 30ms, the minimum width of en=low is same as the pre-driving width. high speed start up time driving time(driving power is adjusted by driving voltage) brake time en out1 out2 (min)30ms en (min) 1 driving cycle stand-by driving off i 2 c brake driving on stand-by driving off 30ms set registers again rstb en this period isn t need, if the brake is not used.
lc898300xa no.a2053-5/7 i 2 c serial interface writing format (sequential writing is possible) after the start condition, slave address (7bit) and ?l?(write mode) are received , the flag ?ack=l? is replied. next, after the 8bit address is receive d, the flag ?ack=l? is replied. next, afte r the 8bit write data is received, the flag ?ack=l? is replied. next, when the stop condition is received, the write data can be written in the specified address. moreover, it is possible to write data in the incremental addr ess by the continuous input of the 8bit data confirming the flag ?ack=l? after the ever y 8bit write data input. reading format (sequential reading is possible) after the dummy writing, the start conditi on, slave address (7bit) and ?h?(read mode) are received, the flag ?ack=l? is replied. next, the 8bit read data is output. after them, when the stop condition is not received, and the read condition is continued, the read data of incr emental address is output one by one. the read condition is end when the end condition is received after the flag ?ack=h?. slave address the slave address is as follows. slave address 1001001 ac k start slave address addr(n) l ac k ac k ac k ac k addr(n) write data addr(n+1) write data addr(n+2) write data stop sda scl ac k start slave address addr(n) l ac k addr(n) read data addr(n+1) read data addr(n+2) read data end sda scl ac k start slave address h ac k dummy writing *1 ac k ac k addr(n+3) read data ac k *1 sda scl
lc898300xa no.a2053-6/7 ac characteristics (i 2 c serial interface) at v ss = 0v, v dd = 2.7 to 3.3v, ta = -30 to 85 c parameter symbol pin min typ max unit comment scl clock frequency f scl scl - - 400 khz start condition hold time t hd;sta scl sda 0.6 - - us scl clock low width t low scl 1.3 - - us scl clock high width t high scl 0.6 - - us re-start condition setup time t su;sta scl sda 0.6 - - us sda hold time t hd;dat scl sda 0 - 0.9 us sda setup time t su;dat scl sda 0.2 - - us *1 sda, scl rise time tr scl sda - 0.3 us *1 sda, scl fall time tf scl sda - 0.3 us *1 stop condition setup time t su;stp scl sda 0.6 - - us stop to start bus open time t buf scl sda 1.3 - - us *1) design assurance (shipment test none) ac characteristic (power on reset) at v ss = 0v, v dd = 2.7 to 3.3v, ta = -30 to 85 c parameter symbol min typ max unit comment v dd rise up time t vddup - - 100 ms - sda 10% 90% 10% 90% 10% 90% 10% 90% 10% 90% 90% t low start condition t hd.sta repeated condition t r t f t high t hd.dat t su.dat t su.sta t hd.sta stop condition start condition 90% 10% 90% 10% 90% t su.stp t buf scl v dd 10% 90% t vddup
lc898300xa no.a2053-7/7 application information 1) case-1: with standby-control note) when sda&scl signal voltages are different from v dd , even if the rstb pin is set to lo w, the io leak current flows. ex) in case of v dd =3.0v & sda=scl=1.8v, the current consumption is about 100 a(typ). 2) case-2: without standby-control note) in case of v dd =3.0v, the current consump tion is about 1.5ma(typ). scl sda en out1 out2 rstb v dd gnd test lra 0.1 ps on semiconductor and the on logo are registered trademarks of semiconductor components industries, llc (scillc). scillc owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. a listing of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent-marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc mak es no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability ar ising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequentia l or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s techn ical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorize d for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other appli cation in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of persona l injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture o fthe part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws a nd is not for resale in any manner.
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